This paper presents the evaluation of different parallelisation approaches for a novel multi-computer architecture with distributed memory. For the purpose of speeding up communication the architecture uses a conjunction of hard- and software, allowing the omission of administrative information like addresses of routing data. We take a closer look at several parallelisation attempts, testing their suitability for the new system. The main objective is the transition from a mono-processor to a parallel architecture with only negligible additional expense for the programmer.
Print ISSN: 1611-2776
Volume: 40, 05/1998
Pages: 33