You are here: Home :: Area NEM :: Computer science

Dietmar Fey, Andreas Loos

OptoRAP – a Reconfigurable Optoelectronic Parallel Processor Architecture for Image Pre-Processing

In smart sensor chips both detector matrix and signal processor core are integrated on one chip. Unfortunately such an architecture approach leads to an "unnatural" serialisation of an already parallel available image. An image is parallel detected with a sensor matrix but it is serially computed with a signal processor. Instead of that we propose an architecture in which the signal evaluation is also parallel processed yielding in higher throughput rates. This shall be achieved by an array of optoelectronic processor elements in which each processing element is directly connected with a detector element and all processing elements carry out together hard-wired parallel algorithms. To find a compromise between small size of a processing element, what corresponds with a high resolution, and a satisfying smartness we favour reconfigurable processing elements.

it – Information Technology (vormals it+ti), Oldenbourg Wissenschaftsverlag

Print ISSN: 1611-2776
Volume: 45, 02/2003
Pages: 092

Journal homepage (external site)

Show all available items of this journal

 

Area NEM