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Matthias Menge

Microprocessor by Hardware-/Software-Codesign

At the TU-Berlin we have developed a 32-bit microprocessor architecture, called Nemesis. It is the foundation for different processors variants, in complexity and speed, each realized as IPs (Intellectual Properties) for Xilinx-FPGAs. This contribution describes Nemesis X, the most efficient implementation. By using dynamic binary translation it is capable of executing up to three instructions per clock cycle, despite its small complexity.

it – Information Technology (vormals it+ti), Oldenbourg Wissenschaftsverlag

Print ISSN: 1611-2776
Volume: 47, 01/2005
Pages: 036 - 044

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