Reconfigurable devices in large complex systems allow the reduction of the amount of required resources. They serve as run-time re-usable devices for performance critical data-oriented processes. However, the use of reconfigurable devices within large systems greatly increases the design complexity. The designer´s task gets even harder when the goal is a resource efficient solution. Constructing a good design requires the consideration of many design alternatives. With today´s complex systems and the resulting degrees of freedom the designer should be assisted by sophisticated design space exploration tools. However, all known system-level design space exploration tools do not exploit the potentials dynamic hardware reconfiguration exposes. Moreover, the implementation of selected solutions poses an additional challenge and also requires a cycle-level simulation. This paper presents a novel design methodology which is able to overcome these drawbacks by integrating state-of-the-art temporal partitioning approaches for dynamic hardware reconfiguration into system-level design space exploration.
Print ISSN: 1611-2776
Volume: 49, 03/2007
Pages: 149 - 156