The target architecture developed within the EVENTS project is optimized for reducing latencies induced by context switches in embedded control systems. This is done, first, by using multithreaded processors (MSPARC), which we have developed in our group. Second, a new architectural concept is employed, in which these processors are utilized as slave modules to an external controller.
This paper describes the class of applications that are supported within the EVENTS project. Next, we present the target architecture. Finally, small test applications are used to gain first insights into the possible performance of the system.
Print ISSN: 1611-2776
Volume: 42, 02/2000
Pages: 40