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Rolf Drechsler

Equivalence Checking of Digital Circuits in an Industrial Environment

By equivalence checking based on formal methods the functional identity of two digital circuits can be proven. The method can be applied to multi million gate designs. In the following, the tool GateComp is described that has been developed over the last few years at Siemens CT, Munich. Features and limitation are shown. It is discussed in a praxis oriented way, how the user can save time. By this, based on formal verification not only the quality can be improved, but also costs are reduced.

it – Information Technology (vormals it+ti), Oldenbourg Wissenschaftsverlag

Print ISSN: 1611-2776
Volume: 43, 04/2001
Pages: 200

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