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Jürgen Becker

Dagstuhl-Seminar “Dynamically and Partially Reconfigurable Architectures”

The paper addresses people from information technology, electrical engineering, computer science, and related areas. It gives an introduction and classification to fine-, coarse-, as well as multi-grain reconfigurable architectures. This data-stream-based and transport-triggered parallel computing technique in combination with dynamical and partial reconfiguration features demonstrates promising perspectives for future CMOS-based microelectronic solutions in multimedia and infotainment, mobile communication, as well as automotive application domains, among others.

it – Information Technology (vormals it+ti), Oldenbourg Wissenschaftsverlag

Print ISSN: 1611-2776
Volume: 46, 04/2004
Pages: 218 - 225

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